The 3rd Design&Verification meetup in Belgrade was held in May 2019. A great contribution to the electronics engineering community in Serbia and two great presentations, Thomas Ziller from Cadence Design Systems spoke about “UVM IEEE – what has changed” and Milos Mirosavljevic from Veriest showed how to “leverage scripts for effective verification.” The event was well attended by 50+ design and verification engineers for different Serbian companies. Our thanks to the lecturers and thank you all for attending!
FV Israel summit 2019
Pessach Celebration 2019