This paper was presented at DVCon Europe 2019, authored by Milan Vlahovic and Ilija Dimitrijevic from Veriest Solutions. The paper presents a comprehensive methodology for systematically testing and validating UVM Verification IP (VIP) components themselves, rather than just using them to verify designs under test. The methodology addresses the critical challenge that VIPs are often treated as proven components without thorough verification, which can lead to debugging difficulties when they don’t behave as expected. The authors propose a structured approach using a self-checking test environment that validates key VIP functions including transaction driving, monitoring, protocol rule checking, and reset handling through error injection techniques and extended scoreboard mechanisms.
Customizing UVM agent to support multi-layered & TDM protocols
Professional Meetup – Novi Sad