This is an informative session for the upcoming First RISC-V prize-winning Hackathon in Serbia!

This event is organized by Veriest, the leading ASIC services company with a significant presence in Serbia, in collaboration with Prof. Feddy Gabbay, who leads the Engineering School at Ruppin Academic Center and is a professor at the Technion in Israel.
It is based on the same concept as events held at these two academic institutions.

The hackathon will take place in Belgrade on 21-22/October.
The event will feature workshops to introduce participants to the RISC-V architecture and machine learning acceleration.
Teams will be tasked with addressing an engineering challenge using RISC-V on an FPGA board.

All students familiar with digital design and computer architecture are eligible to participate.

Are you ready for the challenge?!

Register below to get more information…